OMAP-L138 SoC Dual-Core Processor with 456 MHz Performance, Low-Power Design,

• Manufacturer: Texas Instruments

• Full Designation: OMAP-L138 Low-Power Applications Processor

• Part Number Breakdown:

  • OMAP-L138: Processor family

  • EZW: 361-ball Pb-Free BGA package

  • T: Extended temperature (-40°C to 105°C)

  • D4: 456 MHz device variant

• Core Innovation: Asymmetric Dual-Core SoC combining ARM9 + DSP for optimal performance/power

OMAP-L138 SYSTEM BLOCK DIAGRAM:
┌─────────────────────────────────────────────────────┐
│             OMAP-L138 SoC                           │
├──────────────┬──────────────────────────────────────┤
│  ARM926EJ-S  │      TMS320C674x DSP Core           │
│  Core        │      (Floating/Fixed-Point)         │
│   @456MHz    │      @456MHz                         │
│  (32-bit RISC)│                                     │
├──────────────┼──────────────────────────────────────┤
│  Shared Memory: 128KB RAM, Shared Peripherals       │
├─────────────────────────────────────────────────────┤
│  SYSTEM INTERCONNECT & POWER MANAGEMENT             │
├─────────────────────────────────────────────────────┤
│  PERIPHERALS & INTERFACES (See Section 4)           │
└─────────────────────────────────────────────────────┘

Key Architectural Features:

• Heterogeneous Dual-Core:

  • ARM926EJ-S: Control/application processing, OS hosting

  • C674x DSP: Signal/math-intensive processing

• Shared Memory Architecture: Enables zero-copy data transfer

• Smart Reflex Technology: Adaptive voltage/frequency scaling

A. ARM926EJ-S Core (456 MHz)

• 32-bit RISC processor with MMU

• 16KB Instruction Cache, 16KB Data Cache

• 8KB RAM, 8KB ROM

• Jazelle technology for Java acceleration

• ARMv5TE instruction set architecture

B. TMS320C674x DSP Core (456 MHz)

• Industry's lowest-power floating-point DSP

• VLIW architecture (8 functional units)

• Native hardware support for IEEE single/double precision

• Advanced C compiler with intrinsic optimizations

• 32KB L1P, 32KB L1D, 256KB L2 memory

C. Memory Subsystem

• 128KB Shared RAM (configurable between cores)

• 16KB Boot ROM

• 64KB RAM for ARM-only use

• 64KB RAM for DSP-only use

• External Memory Interfaces:

  • 16-bit DDR2/mDDR (266 MHz)

  • 16-bit EMIFA (async, SDRAM, NOR/NAND flash)

  • 8-bit EMIFB (async, NAND flash)

A. Communication Interfaces

• Ethernet MAC (10/100): With MII/RMII and MDIO

• USB 2.0:

  • 1x USB 2.0 OTG (12-pin ULPI interface)

  • 1x USB 1.1 OHCI Host

• Serial Ports:

  • 2x UART (16550-compatible, 16C750-mode)

  • 2x McASP (Multi-channel Audio Serial Ports)

  • 1x McBSP (Multi-channel Buffered Serial Port)

  • 2x SPI (up to 48 MHz)

  • 1x I²C

• CAN 2.0: 2x CAN controllers

B. Data Conversion & Timing

• 10-bit ADC: 8 channels, 3.5 MSPS

• PWM/HRPWM: 3x 16-bit enhanced eCAP/PWM

• Timers: 7x 32-bit general-purpose timers

• Watchdog Timer

C. Storage & Expansion

• MMC/SD/SDIO: 2x controllers

• PCI 2.3: 32-bit, 33/66 MHz

• ATA/CF Interface: Supports true IDE mode

• Video Port: 8/16-bit interface, BT.656 support

• LCD Controller: Up to 1024x768 resolution

D. System Management

• Power Management: Multiple sleep modes, smart reflex

• Clock Management: Multiple PLLs, flexible clocking

• Security: Secure boot, tamper detection, encryption acceleration

• JTAG: IEEE 1149.1 boundary scan, ETB trace

A. Industrial Automation & Control

Industrial Gateway/Controller:
ARM Core: Linux OS, Web Server, Modbus TCP
DSP Core: Real-time motor control, PID loops
Peripherals: Ethernet, CAN, PWM, ADC, SPI

• PLC/PAC systems

• Motor drives (servo, stepper, BLDC)

• Process control instrumentation

• Industrial robots

B. Medical & Healthcare

Portable Medical Device:
ARM Core: GUI, data storage, connectivity
DSP Core: ECG/EEG signal processing, filtering
Peripherals: LCD, USB, SD card, ADC

• Patient monitoring (vital signs, Holter)

• Portable ultrasound

• Infusion pumps

• Diagnostic equipment

C. Audio/Video Processing

Professional Audio Mixer:
ARM Core: Control interface, effects library
DSP Core: Real-time audio effects, mixing
Peripherals: McASP, Ethernet, USB

• Audio processors (mixers, effects)

• Video analytics (surveillance)

• Teleconferencing systems

D. Communications Infrastructure

Software Defined Radio:
ARM Core: Protocol stack, network management
DSP Core: Baseband processing, filtering
Peripherals: Ethernet, PCI, EMAC

• Radio access networks

• Gateways/routers

• VoIP systems

E. Test & Measurement

• Oscilloscopes/data loggers

• Spectrum analyzers

• Automated test equipment

A. Software Support

Primary Development Paths:
1. ARM-side: Linux (Mainline kernel support)
2. DSP-side: SYS/BIOS RTOS
3. Heterogeneous: TI-RTOS, OpenMP

• Operating Systems:

  • Linux (TI Processor SDK, mainline kernel)

  • TI-RTOS

  • FreeRTOS

  • WinCE (limited)

• Development Tools:

  • Code Composer Studio (CCS) IDE

  • ARM GCC toolchain

  • DSP/BIOS

  • OpenCL support

• Middleware:

  • Codec engines (video/audio)

  • Industrial protocol stacks

  • Graphics libraries

B. Hardware Platforms

• Evaluation Modules: OMAP-L138/LCDK

• Reference Designs:

  • Industrial communication gateway

  • Motor control platform

  • Audio development kit

A. Power Management Strategy

Power Sequencing:
1. Enable 1.8V I/O
2. Enable 1.2V Core
3. Apply reset deassertion
4. Initialize PLLs gradually

• Multiple Power Domains: Requires careful sequencing

• Power Estimation Tool: TI's Power Estimation Spreadsheet

• Thermal: θJA = 28.4°C/W (with airflow)

B. Memory Architecture Optimization

Optimal Configuration:
ARM: 64KB RAM (private) + 64KB shared
DSP: 64KB RAM (private) + 64KB shared
External: 128MB DDR2 for bulk storage

• Shared RAM partitioning critical for performance

• Cache coherency must be managed in software

• DDR2 layout critical for signal integrity

C. Boot Options

Boot Sequence Options:
1. SPI Flash (24-bit addressing)
2. NAND Flash (8/16-bit)
3. MMC/SD Card
4. UART (XMODEM)
5. Ethernet (BOOTP)

• Boot modes selected via GPIO pins

• U-Boot primary bootloader for Linux

• Secure boot support via TI security package

vs. Earlier Devices (OMAP-L137):

• Higher performance (456 vs 300 MHz)

• Lower power consumption

• Enhanced peripherals

• Smaller package

vs. Successor Devices (AM335x):

• OMAP-L138: DSP + ARM (signal processing focus)

• AM335x: ARM-only (Cortex-A8, higher ARM performance)

• Choose OMAP-L138 when DSP processing required

vs. Competing Solutions:

• NXP i.MX: Similar ARM performance, lacks integrated DSP

• ADI Blackfin/Sharc: DSP-focused, less capable ARM

• Xilinx Zynq: FPGA + ARM, different use case

A. Production Status (as of 2024 knowledge cutoff)

• Active: Still in production for industrial customers

• Lifecycle: Mature product, long-term supply guaranteed

• New Designs: Consider AM6x or AM62x for new designs

B. When to Choose OMAP-L138EZWTD4:

1. Legacy Designs: Upgrading from OMAP-L137

2. DSP Requirement: Need floating-point DSP + ARM

3. Industrial Temperature: -40°C to 105°C operation

4. Code Reuse: Existing DSP algorithm investment

C. Modern Alternatives:

• Sitara AM62x: Lower cost, Cortex-A53, no DSP

• Sitara AM64x: Industrial-focused, Cortex-A53 + R5F

• Jacinto 7: Automotive/vision, DSP + accelerators

1. Datasheet: SPRS586H (Rev. H, 2014)

2. Technical Reference: SPRUH77C (Rev. C, 2012)

3. EVM User's Guide: SPRUHG6

4. Linux SDK: Processor SDK RTOS/Linux

5. Power Estimation Tool: SPC948B