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China factories

China factory - SHENZHEN ECER NETWORK TECHNOLOGY CO.,LTD

SHENZHEN ECER NETWORK TECHNOLOGY CO.,LTD

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  3. HY5PS1G831CFP-S6 DDR DRAM Mobile Flash Memory Chip 128MX8 0.4ns CMOS PBGA60
China HY5PS1G831CFP-S6 DDR DRAM Mobile Flash Memory Chip 128MX8 0.4ns CMOS PBGA60
China HY5PS1G831CFP-S6 DDR DRAM Mobile Flash Memory Chip 128MX8 0.4ns CMOS PBGA60

  1. China HY5PS1G831CFP-S6 DDR DRAM Mobile Flash Memory Chip 128MX8 0.4ns CMOS PBGA60

HY5PS1G831CFP-S6 DDR DRAM Mobile Flash Memory Chip 128MX8 0.4ns CMOS PBGA60

  1. MOQ： 1260PCS/BOX
  2. Price： Negotiation
  3. Get Latest Price
Payment Terms T/T, PayPal, Western Union, Escrow and others
Supply Ability 10k per month
Delivery Time 3-5 work days
Packaging Details 10cm X 10cm X 5cm
Item numbe HY5PS1G831CFP-S6
Denisty 1G(128MX8)
Products Category Memory & Flash Memory
Clock Frequency 400.0 MHz
Access Time-Max 40NS
Technology DRAMs
Access Mode MULTI BANK PAGE BURST
Package FBGA60
Model Number HY5PS1G831CFP-S6
Certification Original Parts

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  1. Product Details
  2. Company Details

Product Specification

Payment Terms T/T, PayPal, Western Union, Escrow and others Supply Ability 10k per month
Delivery Time 3-5 work days Packaging Details 10cm X 10cm X 5cm
Item numbe HY5PS1G831CFP-S6 Denisty 1G(128MX8)
Products Category Memory & Flash Memory Clock Frequency 400.0 MHz
Access Time-Max 40NS Technology DRAMs
Access Mode MULTI BANK PAGE BURST Package FBGA60
Model Number HY5PS1G831CFP-S6 Certification Original Parts
High Light flash memory ic chip ，flash memory controller chip

Flash Memory Chip HY5PS1G831CFP-S6 DDR DRAM, 128MX8, 0.4ns, CMOS, PBGA60

 

 

Features

  • VDD = 1.8 +/- 0.1V•VDDQ = 1.8 +/- 0.1V
  • All inputs and outputs are compatible with SSTL_18 interface
  • 8 banks
  • Fully differential clock inputs (CK, /CK) operation
  • Double data rate interface
  • Source synchronous-data transaction aligned to bidirectional data strobe (DQS, /DQS)
  • Differential Data Strobe (DQS, /DQS)
  • Data outputs on DQS, /DQS edges when read (edged DQ)
  • Data inputs on DQS centers when write(centered DQ)
  • On chip DLL align DQ, DQS and /DQS transition with CK transition
  • DM mask write data-in at the both rising and falling edges of the data strobe
  • All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock
  • Programmable CAS latency 3, 4, 5 and 6 supported
  • Programmable additive latency 0, 1, 2, 3, 4 and 5 supported
  • Programmable burst length 4/8 with both nibble sequential and interleave mode
  • Internal eight bank operations with single pulsed RAS
  • Auto refresh and self refresh supported
  • tRAS lockout supported
  • 8K refresh cycles /64ms
  • JEDEC standard 60ball FBGA(x4/x8) , 84ball FBGA(x16)
  • Full strength driver option controlled by EMR
  • On Die Termination supported
  • Off Chip Driver Impedance Adjustment supported
  • Read Data Strobe supported (x8 only)
  • Self-Refresh High Temperature Entry

  • This product is in compliance with the directive pertaining of RoHS.

 

 

Feature:

 

 

 

 

 

Company Details

Bronze Gleitlager

,

Bronze Sleeve Bushings

 and 

Graphite Plugged Bushings

 from Quality China Factory

  • Business Type:

    Distributor/Wholesaler,Agent,Importer,Exporter,Trading Company,Seller

  • Year Established:

    2009

  • Total Annual:

    5000000-10000000

  • Employee Number:

    100~120

  • Ecer Certification：

    Verified Supplier

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Get in touch with us

  • Reach Us
  • SHENZHEN ECER NETWORK TECHNOLOGY CO.,LTD
  • ZHUOYUEHUI A2603 ZHUOYUEHUI CENTER PLAZA(SOUTH AREA) NO.126 ZHONGKANG ROAD MEIDU COMMUNITY MEILIN STREET
  • https://www.cpuprocessorchip.com/

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