Beijing Silk Road Enterprise Management Services Co., Ltd.
| Description | SMD5032-6P Oscillators RoHS |
| Mfr. Part # | 511BBA100M000BAG |
| Package | SMD5032-6P |
| Model Number | 511BBA100M000BAG |
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Product Specification
| Description | SMD5032-6P Oscillators RoHS | Mfr. Part # | 511BBA100M000BAG |
| Package | SMD5032-6P | Model Number | 511BBA100M000BAG |
The Si510/511 Crystal Oscillator (XO) from Silicon Laboratories utilizes advanced DSPLL technology to provide any frequency from 100 kHz to 250 MHz. Unlike traditional XOs, this device uses a single fixed crystal and a proprietary DSPLL synthesizer, offering enhanced reliability, improved mechanical robustness, and excellent stability. Its IC-based design provides superior supply noise rejection, simplifying low jitter clock generation in noisy environments. Crystal ESR and DLD are individually production-tested for guaranteed performance. The Si510/511 is factory-configurable for various user specifications, including frequency, supply voltage, output format, output enable polarity, and stability, with factory programming eliminating long lead times and NRE charges.
| Parameter | Symbol | VDD | TA (C) | Min | Typ | Max | Unit | Notes |
| Supply Voltage | VDD | 3.3 V option | 40 to 85 | 2.97 | 3.3 | 3.63 | V | |
| VDD | 2.5 V option | 40 to 85 | 2.25 | 2.5 | 2.75 | V | ||
| VDD | 1.8 V option | 40 to 85 | 1.71 | 1.8 | 1.89 | V | ||
| Supply Current | IDD | CMOS, 100 MHz, single-ended | 40 to 85 | 21 | 26 | mA | ||
| Supply Current | IDD | LVDS (output enabled) | 40 to 85 | 19 | 23 | mA | ||
| Supply Current | IDD | LVPECL (output enabled) | 40 to 85 | 39 | 43 | mA | ||
| Supply Current | IDD | HCSL (output enabled) | 40 to 85 | 41 | 44 | mA | ||
| Supply Current | IDD | Tristate (output disabled) | 40 to 85 | 18 | mA | |||
| OE Setting | VIH | Active High | 40 to 85 | 0.80 x VDD | V | See Note | ||
| OE Setting | VIL | Active High | 40 to 85 | 0.20 x VDD | V | See Note | ||
| OE Resistor | RI | Internal Pull-Up/Pull-Down | 40 to 85 | 45 | k | *Note: Active high and active low polarity OE options available. Active high option includes an internal pull-up. Active low option includes an internal pull-down. | ||
| Nominal Frequency | FO | CMOS, Dual CMOS | 40 to 85 | 0.1 | 212.5 | MHz | ||
| FO | LVDS/LVPECL/HCSL | 40 to 85 | 0.1 | 250 | MHz | |||
| FO | LVDS/LVPECL/HCSL | 40 to 85 | 0.1 | 250 | MHz | |||
| Total Stability | Frequency Stability | Grade C | 40 to 85 | 30 | +30 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 C. | |
| Frequency Stability | Grade B | 40 to 85 | 50 | +50 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 C. | ||
| Frequency Stability | Grade A | 40 to 85 | 100 | +100 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 C. | ||
| Temperature Stability | Frequency Stability | Grade C | 40 to 85 | 20 | +20 | ppm | ||
| Frequency Stability | Grade B | 40 to 85 | 25 | +25 | ppm | |||
| Frequency Stability | Grade A | 40 to 85 | 50 | +50 | ppm | |||
| Startup Time | TSU | Minimum VDD until output frequency (FO) within specification | 40 to 85 | 10 | ms | |||
| Disable Time | TD | FO 10 MHz | 40 to 85 | 5 | s | |||
| Disable Time | TD | FO < 10 MHz | 40 to 85 | 40 | s | |||
| Enable Time | TE | FO 10 MHz | 40 to 85 | 20 | s | |||
| Enable Time | TE | FO < 10 MHz | 40 to 85 | 60 | s | |||
| CMOS Output Logic High | VOH | 40 to 85 | 0.85 x VDD | V | ||||
| VOH | 40 to 85 | 0.85 x VDD | V | |||||
| VOH | 40 to 85 | 0.85 x VDD | V | |||||
| CMOS Output Logic Low | VOL | 40 to 85 | 0.15 x VDD | V | ||||
| VOL | 40 to 85 | 0.15 x VDD | V | |||||
| VOL | 40 to 85 | 0.15 x VDD | V | |||||
| CMOS Output Rise/Fall Time | TR/TF | 0.1 to 212.5 MHz, CL = 15 pF | 40 to 85 | 0.45 | 0.8 | 1.2 | ns | |
| TR/TF | 0.1 to 212.5 MHz, CL = no load | 40 to 85 | 0.3 | 0.6 | 0.9 | ns | ||
| TR/TF | 0.1 to 212.5 MHz, CL = no load | 40 to 85 | 0.3 | 0.6 | 0.9 | ns | ||
| LVPECL Output Rise/Fall Time | TR/TF | 100 MHz 565 MHz | 40 to 85 | 100 | 565 | ps | ||
| HCSL Output Rise/Fall Time | TR/TF | 100 MHz 565 MHz | 40 to 85 | 100 | 470 | ps | ||
| LVDS Output Rise/Fall Time | TR/TF | 350 MHz 800 MHz | 40 to 85 | 350 | 800 | ps | ||
| LVPECL Output Common Mode | VOC | 50 to VDD 2 V, single-ended | 40 to 85 | VDD 1.4 V | V | |||
| LVPECL Output Swing | VO | 50 to VDD 2 V, single-ended | 40 to 85 | 0.55 | 0.8 | 0.90 | VPPSE | |
| LVDS Output Common Mode | VOC | 100 line-line, VDD = 3.3/2.5 V | 40 to 85 | 1.13 | 1.23 | 1.33 | V | |
| LVDS Output Common Mode | VOC | 100 line-line, VDD = 1.8 V | 40 to 85 | 0.83 | 0.92 | 1.00 | V | |
| LVDS Output Swing | VO | Single-ended, 100 differential termination | 40 to 85 | 0.25 | 0.35 | 0.45 | VPPSE | |
| HCSL Output Common Mode | VOC | 50 to ground | 40 to 85 | 0.35 | 0.38 | 0.42 | V | |
| HCSL Output Swing | VO | Single-ended | 40 to 85 | 0.58 | 0.73 | 0.85 | VPPSE | |
| Duty Cycle | DC | All formats | 40 to 85 | 48 | 50 | 52 | % | |
| Period Jitter (RMS) | JPRMS | 10k samples | 40 to 85 | 1.3 | ps | LVPECL. Applies to output frequencies: 74.17582, 74.25, 75, 77.76, 100, 106.25, 125, 148.35165, 148.5, 150, 155.52, 156.25, 212.5, 250 MHz. | ||
| Period Jitter (RMS) | JPRMS | 10k samples | 40 to 85 | 2.1 | ps | LVDS. Applies to output frequencies: 74.17582, 74.25, 75, 77.76, 100, 106.25, 125, 148.35165, 148.5, 150, 155.52, 156.25, 212.5, 250 MHz. | ||
| Period Jitter (Pk-Pk) | JPPKPK | 10k samples | 40 to 85 | 11 | ps | LVPECL. Applies to output frequencies: 74.17582, 74.25, 75, 77.76, 100, 106.25, 125, 148.35165, 148.5, 150, 155.52, 156.25, 212.5, 250 MHz. | ||
| Period Jitter (Pk-Pk) | JPPKPK | 10k samples | 40 to 85 | 18 | ps | LVDS. Applies to output frequencies: 74.17582, 74.25, 75, 77.76, 100, 106.25, 125, 148.35165, 148.5, 150, 155.52, 156.25, 212.5, 250 MHz. | ||
| Phase Jitter (RMS) | J | 1.875 MHz to 20 MHz integration bandwidth (brickwall) | 40 to 85 | 0.31 | 0.5 | ps | LVPECL. Applies to output frequencies: 100, 106.25, 125, 148.35165, 148.5, 150, 155.52, 156.25, 212.5 and 250 MHz. | |
| Phase Jitter (RMS) | J | 1.875 MHz to 20 MHz integration bandwidth (brickwall) | 40 to 85 | 0.25 | 0.55 | ps | LVDS. Applies to output frequencies: 100, 106.25, 125, 148.35165, 148.5, 150, 155.52, 156.25, 212.5 and 250 MHz. | |
| Phase Jitter (RMS) | J | 12 kHz to 20 MHz integration bandwidth (brickwall) | 40 to 85 | 0.8 | 1.0 | ps | LVPECL. Applies to output frequencies: 100, 106.25, 125, 148.35165, 148.5, 150, 155.52, 156.25, 212.5 and 250 MHz. | |
| Phase Jitter (RMS) | J | 12 kHz to 20 MHz integration bandwidth (brickwall) | 40 to 85 | 0.8 | 1.0 | ps | LVDS. Applies to output frequencies: 100, 106.25, 125, 148.35165, 148.5, 150, 155.52, 156.25, 212.5 and 250 MHz. | |
| Phase Noise | N | 100 Hz | 40 to 85 | 86 | dBc/Hz | LVPECL, 156.25 MHz | ||
| Phase Noise | N | 1 kHz | 40 to 85 | 109 | dBc/Hz | LVPECL, 156.25 MHz | ||
| Phase Noise | N | 10 kHz | 40 to 85 | 116 | dBc/Hz | LVPECL, 156.25 MHz | ||
| Phase Noise | N | 100 kHz | 40 to 85 | 123 | dBc/Hz | LVPECL, 156.25 MHz | ||
| Phase Noise | N | 1 MHz | 40 to 85 | 136 | dBc/Hz | LVPECL, 156.25 MHz | ||
| Phase Noise | N | 100 Hz | 40 to 85 | 86 | dBc/Hz | LVDS, 156.25 MHz | ||
| Phase Noise | N | 1 kHz | 40 to 85 | 109 | dBc/Hz | LVDS, 156.25 MHz | ||
| Phase Noise | N | 10 kHz | 40 to 85 | 116 | dBc/Hz | LVDS, 156.25 MHz | ||
| Phase Noise | N | 100 kHz | 40 to 85 | 123 | dBc/Hz | LVDS, 156.25 MHz | ||
| Phase Noise | N | 1 MHz | 40 to 85 | 136 | dBc/Hz | LVDS, 156.25 MHz | ||
| Additive RMS Jitter Due to External Power Supply Noise | JPSR | 10 kHz sinusoidal noise | 40 to 85 | 3.0 | ps | 156.25 MHz. 100 mVPP noise on VDD (2.5/3.3 V). | ||
| Additive RMS Jitter Due to External Power Supply Noise | JPSR | 100 kHz sinusoidal noise | 40 to 85 | 3.5 | ps | 156.25 MHz. 100 mVPP noise on VDD (2.5/3.3 V). | ||
| Additive RMS Jitter Due to External Power Supply Noise | JPSR | 500 kHz sinusoidal noise | 40 to 85 | 3.5 | ps | 156.25 MHz. 100 mVPP noise on VDD (2.5/3.3 V). | ||
| Additive RMS Jitter Due to External Power Supply Noise | JPSR | 1 MHz sinusoidal noise | 40 to 85 | 3.5 | ps | 156.25 MHz. 100 mVPP noise on VDD (2.5/3.3 V). | ||
| Spurious | SPR | LVPECL output, 156.25 MHz, offset>10 kHz | 40 to 85 | 75 | dBc | |||
| Spurious | SPR | LVDS output, 156.25 MHz, offset>10 kHz | 40 to 85 | 75 | dBc |
Company Details
Business Type:
Manufacturer,Distributor/Wholesaler,Agent,Importer
Year Established:
2009
Employee Number:
>>300
Ecer Certification：
Verified Supplier
Company Profile Beijing Silk Road Enterprise Management Services Co.,Ltd. is a professional company focus on integrated circuit ic business. Beijing Silk Road will also responsible with exporting and logistic business. there is professional factory Beijing Silk Road which focus on desigining an... Company Profile Beijing Silk Road Enterprise Management Services Co.,Ltd. is a professional company focus on integrated circuit ic business. Beijing Silk Road will also responsible with exporting and logistic business. there is professional factory Beijing Silk Road which focus on desigining an...
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